Dielectrics in Silicon Carbide Devices: Technology and Application

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Dielectrics in Silicon Carbide Devices: Technology and Application

Anthony O’Neill, Oliver Vavasour, Stephen Russell, Faiz Arith, Jesus Urresti, Peter Gammon

Formation of dielectric layers on SiC is a key feature of device processing technology. Achieving high mobility SiC MOSFETs is dependent on solving challenges within gate stack formation, where the dielectric plays a central role. Dielectrics also play a key role in surface passivation of SiC devices. This chapter reviews the main dielectrics that are used in SiC devices. The most commonly used dielectrics in electronic devices are SiO2 and Si3N4 and so these are introduced first, followed by high-κ dielectrics (i.e. dielectrics with higher permittivity than Si3N4). The methods of dielectric deposition are discussed before focusing on SiC thermal oxidation. Different parameters of the oxidation process and post-oxidation annealing, which have an impact on oxide quality and the formation of residual carbon in the SiO2/SiC interface, are evaluated. Efforts to improve electron mobility in SiC MOSFETs using a variety of dielectric layer formation techniques are reviewed, indicating where progress has been made. Issues surrounding SiC surface passivation by dielectrics are also discussed.

Keywords
Silicon Oxide, High-κ Dielectrics, MOSFET, Gate Oxide, Surface Passivation, Post Oxidation Annealing, Field Effect Mobility, Silicon Nitride

Published online 2/15/2020, 44 pages

Citation: Anthony O’Neill, Oliver Vavasour, Stephen Russell, Faiz Arith, Jesus Urresti, Peter Gammon, Dielectrics in Silicon Carbide Devices: Technology and Application, Materials Research Foundations, Vol. 69, pp 63-106, 2020

DOI: https://doi.org/10.21741/9781644900673-2

Part of the book on Advancing Silicon Carbide Electronics Technology II

References
[1] L. A. Lipkin, J. W. Palmour, “Insulator investigation on SiC for improved reliability,” IEEE Transactions on Electron Devices, vol. 46, no. 3, pp. 525-532, 1999. https://doi.org/10.1109/16.748872
[2] Y. Hiroshi, K. Tsunenobu, M. Hiroyuki, “Shallow states at SiO2/4H-SiC interface on (1120) and (0001) faces,” Applied Physics Letters, vol. 81, no. 2, pp. 301-303, 2002. https://doi.org/10.1063/1.1492313
[3] J. M. Knaup, P. Deák, T. Frauenheim, A. Gali, Z. Hajnal, W. J. Choyke, “Theoretical study of the mechanism of dry oxidation of 4H-SiC,” Physical Review B, vol. 71, no. 23, pp. 235321, 2005.
[4] T. E. Rudenko, I. N. Osiyuk, I. P. Tyagulski, H. Ö. Ólafsson, E. Ö. Sveinbjörnsson, “Interface trap properties of thermally oxidized n-type 4H–SiC and 6H–SiC,” Solid-State Electronics, vol. 49, no. 4, pp. 545-553, 2005. https://doi.org/10.1016/j.sse.2004.12.006
[5] A. F. Basile, J. Rozen, J. R. Williams, L. C. Feldman, P. M. Mooney, “Capacitance-voltage and deep-level-transient spectroscopy characterization of defects near SiO2/SiC interfaces,” Journal of Applied Physics, vol. 109, no. 6, pp. 064514, 2011. https://doi.org/10.1063/1.3552303
[6] S. Dhar, X. D. Chen, P. M. Mooney, J. R. Williams, L. C. Feldman, “Ultrashallow defect states at SiO2 ∕4H–SiC interfaces,” Applied Physics Letters, vol. 92, no. 10, pp. 102112, 2008. https://doi.org/10.1063/1.2898502
[7] O. Dai, Y. Hiroshi, H. Tomoaki, F. Takashi, “Removal of near-interface traps at SiO2/4H–SiC (0001) interfaces by phosphorus incorporation,” Applied Physics Letters, vol. 96, no. 20, pp. 203508, 2010. https://doi.org/10.1063/1.3432404
[8] T. Kimoto, J. A. Cooper, “Fundamentals of silicon carbide technology: growth, characterization, devices, and applications,” John Wiley & Sons, 2014, 538 pages.
[9] K. Matocha, I.-H. Ji, X. Zhang, S. Chowdhury, “SiC Power MOSFETs: Designing for Reliability in Wide-Bandgap Semiconductors.” pp. 1-8.
[10] S. Takagi, A. Toriumi, M. Iwase, H. Tango, “On the universality of inversion layer mobility in Si MOSFET’s: Part I-effects of substrate impurity concentration,” IEEE Transactions on Electron Devices, vol. 41, no. 12, pp. 2357-2362, 1994. https://doi.org/10.1109/16.337449
[11] D. K. Schroder, Semiconductor material and device characterization: John Wiley & Sons, 2015.
[12] S. Y. Chou, D. Antoniadis, “Relationship between measured and intrinsic transconductances of FET’s,” IEEE Transactions on Electron Devices, vol. 34, no. 2, pp. 448-450, 1987.
[13] T. Ohashi, Y. Nakabayashi, R. Iijima, “Investigation of the universal mobility of SiC MOSFETs using wet oxide insulators on carbon face with low interface state density,” IEEE Transactions on Electron Devices, vol. 65, no. 7, pp. 2707-2713, 2018.
[14] F. Roccaforte, P. Fiorenza, F. Giannazzo, “Impact of the Morphological and Electrical Properties of SiO2/4H-SiC Interfaces on the Behavior of 4H-SiC MOSFETs,” ECS Journal of Solid State Science and Technology, vol. 2, no. 8, pp. N3006-N3011, 2013. https://doi.org/10.1149/2.002308jss
[15] S. Tanimoto, H. Tanaka, T. Hayashi, Y. Shimoida, M. Hoshi, T. Mihara, “High-Reliability ONO Gate Dielectric for Power MOSFETs,” Materials Science Forum, vol. 483-485, pp. 677-680, 2005. https://doi.org/10.4028/www.scientific.net/MSF.483-485.677
[16] S. Tanimoto, “Impact of Dislocations on Gate Oxide in SiC MOS Devices and High Reliability ONO Dielectrics,” Materials Science Forum, vol. 527-529, pp. 955-960, 2006. https://doi.org/10.4028/www.scientific.net/MSF.527-529.955
[17] T. Satoshi, “Highly reliable SiO2/SiN/SiO2(ONO) gate dielectric on 4H‐SiC,” Electronics and Communications in Japan (Part II: Electronics), vol. 90, no. 5, pp. 1-10, 2007. https://doi.org/doi:10.1002/ecjb.20329
[18] S. Tanimoto, T. Suzuki, S. Yamagami, H. Tanaka, T. Hayashi, Y. Hirose, M. Hoshi, “Negative Field Reliability of ONO Gate Dielectric on 4H-SiC,” Materials Science Forum, vol. 600-603, pp. 795-798, 2009. https://doi.org/10.4028/www.scientific.net/MSF.600-603.795
[19] K. J. Kuhn, “Reducing Variation in Advanced Logic Technologies: Approaches to Process and Design for Manufacturability of Nanoscale CMOS.” pp. 471-474.
[20] R. Mahapatra, A. K. Chakraborty, A. B. Horsfall, N. G. Wright, G. Beamson, K. S. Coleman, “Energy-band alignment of HfO2∕SiO2∕SiC gate dielectric stack,” Applied Physics Letters, vol. 92, no. 4, 2008. https://doi.org/10.1063/1.2839314
[21] C. M. Tanner, J. Choi, J. P. Chang, “Electronic structure and band alignment at the HfO2∕4H-SiC interface,” Journal of Applied Physics, vol. 101, no. 3, 2007. https://doi.org/10.1063/1.2432402
[22] R. Suri, C. J. Kirkpatrick, D. J. Lichtenwalner, V. Misra, “Energy-band alignment of Al2O3 and HfAlO gate dielectrics deposited by atomic layer deposition on 4H–SiC,” Applied Physics Letters, vol. 96, no. 4, pp. 042903, 2010. https://doi.org/10.1063/1.3291620
[23] D. J. Lichtenwalner, V. Misra, S. Dhar, S.-H. Ryu, A. Agarwal, “High-mobility enhancement-mode 4H-SiC lateral field-effect transistors utilizing atomic layer deposited Al2O3 gate dielectric,” Applied Physics Letters, vol. 95, no. 15, pp. 152113, 2009. https://doi.org/10.1063/1.3251076
[24] S. Hino, T. Hatayama, J. Kato, E. Tokumitsu, N. Miura, T. Oomori, “High channel mobility 4H-SiC metal-oxide-semiconductor field-effect transistor with low temperature metal-organic chemical-vapor deposition grown Al2O3 gate insulator,” Applied Physics Letters, vol. 92, no. 18, pp. 183503, 2008. https://doi.org/10.1063/1.2903103
[25] T. Hatayama, S. Hino, N. Miura, T. Oomori, E. Tokumitsu, “Remarkable Increase in the Channel Mobility of SiC-MOSFETs by Controlling the Interfacial SiO2 Layer Between Al2O3 and SiC,” Electron Devices, IEEE Transactions on, vol. 55, no. 8, pp. 2041-2045, 2008. https://doi.org/10.1109/TED.2008.926647
[26] X. Yang, B. Lee, V. Misra, “High Mobility 4H-SiC Lateral MOSFETs Using Lanthanum Silicate and Atomic Layer Deposited SiO2,” IEEE Electron Device Letters, vol. 36, no. 4, pp. 312-314, 2015. https://doi.org/10.1109/LED.2015.2399891
[27] M. O. Aboelfotoh, R. S. Kern, S. Tanaka, R. F. Davis, C. I. Harris, “Electrical characteristics of metal/AlN/n‐type 6H-SiC(0001) heterostructures,” Applied Physics Letters, vol. 69, no. 19, pp. 2873-2875, 1996. https://doi.org/10.1063/1.117347
[28] C. M. Tanner, Y.-C. Perng, C. Frewin, S. E. Saddow, J. P. Chang, “Electrical performance of Al2O3 gate dielectric films deposited by atomic layer deposition on 4H-SiC,” Applied Physics Letters, vol. 91, no. 20, pp. 203510, 2007. https://doi.org/10.1063/1.2805742
[29] J. Robertson, R. M. Wallace, “High-K materials and metal gates for CMOS applications,” Materials Science and Engineering: R: Reports, vol. 88, no. Supplement C, pp. 1-41, 2015. https://doi.org/10.1016/j.mser.2014.11.001
[30] Stanley Wolf and Richard N. Tauber, Silicon Processing for the VLSI Era, 2nd ed., USA: Lattice Press, 2000.
[31] S. Sridevan, V. Misra, P. K. McLarty, B. J. Baliga, J. J. Wortman, “Rapid thermal chemical vapor deposited oxides on N-type 6H-silicon carbide,” IEEE Electron Device Letters, vol. 16, no. 11, pp. 524-526, 1995. https://doi.org/10.1109/55.468288
[32] S. Sridevan, B. J. Baliga, “Lateral n-channel inversion mode 4H-SiC MOSFETs,” IEEE Electron Device Letters, vol. 19, no. 7, pp. 228-230, 1998. https://doi.org/10.1109/55.701425
[33] H. Yano, T. Hatayama, Y. Uraoka, T. Fuyuki, “High Temperature NO Annealing of Deposited SiO2 and SiON Films on N-Type 4H-SiC,” Materials Science Forum, vol. 483-485, pp. 685-688, 2005. https://doi.org/10.4028/www.scientific.net/MSF.483-485.685
[34] H. K. T. Kimoto, M. Noborio, J. Suda, H. Matsunami, “Improved Dielectric and Interface Properties of 4H-SiC MOS Structures Processed by Oxide Deposition and N2O Annealing,” Materials Science Forum, vol. 527-529, pp. 987-990, 2006.
[35] N. Masato, G. Michael, J. B. Anton, P. Dethard, F. Peter, S. Jun, K. Tsunenobu, “Reliability of Nitrided Gate Oxides for N- and P-Type 4H-SiC(0001) Metal–Oxide–Semiconductor Devices,” Japanese Journal of Applied Physics, vol. 50, no. 9R, pp. 090201, 2011.
[36] Y. Nanen, H. Yoshioka, M. Noborio, J. Suda, T. Kimoto, “Enhanced Drain Current of 4H-SiC MOSFETs by Adopting a Three-Dimensional Gate Structure,” IEEE Transactions on Electron Devices, vol. 56, no. 11, pp. 2632-2637, 2009. https://doi.org/10.1109/TED.2009.2030437
[37] R. Esteve, A. Schöner, S. A. Reshanov, C. M. Zetterling, “Comparative Study of Thermal Oxides and Post-Oxidized Deposited Oxides on n-Type Free Standing 3C-SiC,” Materials Science Forum, vol. 645-648, pp. 829-832, 2010. https://doi.org/10.4028/www.scientific.net/MSF.645-648.829
[38] A. Pérez-Tomás, P. Godignon, N. Mestres, R. Pérez, J. Millán, “A study of the influence of the annealing processes and interfaces with deposited SiO2 from tetra-ethoxy-silane for reducing the thermal budget in the gate definition of 4H–SiC devices,” Thin Solid Films, vol. 513, no. 1-2, pp. 248-252, 2006. https://doi.org/10.1016/j.tsf.2005.12.308
[39] A. Pérez-Tomás, P. Godignon, J. Camassel, N. Mestres, V. Soulière, “PECVD Deposited TEOS for Field-Effect Mobility Improvement in 4H-SiC MOSFETs on the (0001) and (11-20) Faces,” Materials Science Forum, vol. 527-529, pp. 1047-1050, 2006. https://doi.org/10.4028/www.scientific.net/MSF.527-529.1047
[40] K. Kawase, S. Noda, T. Nakai, Y. Uehara, “Densification of Chemical Vapor Deposition Silicon Dioxide Film Using Ozone Treatment,” Japanese Journal of Applied Physics, vol. 48, no. 10, 2009. https://doi.org/10.1143/jjap.48.101401
[41] Y. K. Sharma, A. C. Ahyi, T. Issacs-Smith, M. R. Jennings, S. M. Thomas, P. Mawby, S. Dhar, J. R. Williams, “Stable Phosphorus Passivated SiO2/4H-SiC Interface Using Thin Oxides,” Materials Science Forum, vol. 806, pp. 139-142, 2015. https://doi.org/10.4028/www.scientific.net/MSF.806.139
[42] R. W. Johnson, A. Hultqvist, S. F. Bent, “A brief review of atomic layer deposition: from fundamentals to applications,” Materials Today, vol. 17, no. 5, pp. 236-246, 2014. https://doi.org/10.1016/j.mattod.2014.04.026
[43] F. Arith, J. Urresti, K. Vasilevskiy, S. Olsen, N. Wright, A. O’Neill, “Increased Mobility in Enhancement Mode 4H-SiC MOSFET Using a Thin SiO2 / Al2O3 Gate Stack,” IEEE Electron Device Letters, vol. 39, no. 4, pp. 564-567, 2018. https://doi.org/10.1109/LED.2018.2807620
[44] S. S. Suvanam, M. Usman, D. Martin, M. G. Yazdi, M. Linnarsson, A. Tempez, M. Götelid, A. Hallén, “Improved interface and electrical properties of atomic layer deposited Al2O3/4H-SiC,” Applied Surface Science, vol. 433, no. Supplement C, pp. 108-115, 2018. https://doi.org/10.1016/j.apsusc.2017.10.006
[45] X. Yang, B. Lee, V. Misra, “Electrical Characteristics of SiO2 Deposited by Atomic Layer Deposition on 4H-SiC After Nitrous Oxide Anneal,” IEEE Transactions on Electron Devices, vol. 63, no. 7, pp. 2826-2830, 2016. https://doi.org/10.1109/TED.2016.2565665
[46] D. Dutta, D. De, D. Fan, S. Roy, G. Alfieri, M. Camarda, M. Amsler, J. Lehmann, H. Bartolf, S. Goedecker, “Evidence for carbon clusters present near thermal gate oxides affecting the electronic band structure in SiC-MOSFET,” Applied Physics Letters, vol. 115, no. 10, pp. 101601, 2019.
[47] B. E. Deal, A. S. Grove, “General Relationship for the Thermal Oxidation of Silicon,” Journal of Applied Physics, vol. 36, no. 12, pp. 3770-3778, 1965. https://doi.org/10.1063/1.1713945
[48] Y. Song, S. Dhar, L. C. Feldman, G. Chung, J. R. Williams, “Modified Deal Grove model for the thermal oxidation of silicon carbide,” Journal of Applied Physics, vol. 95, no. 9, pp. 4953-4957, 2004. https://doi.org/10.1063/1.1690097
[49] Y. Hijikata, S. Yagi, H. Yaguchi, S. Yoshida, “Thermal Oxidation Mechanism of Silicon Carbide,” in: Physics and Technology of Silicon Carbide Devices, Y. Hijikata, ed., Rijeka: InTech, 2012, p. Ch. 07.
[50] Y. Yonezawa, T. Mizushima, K. Takenaka, H. Fujisawa, T. Kato, S. Harada, Y. Tanaka, M. Okamoto, M. Sometani, D. Okamoto, “Low V f and highly reliable 16 kV ultrahigh voltage SiC flip-type n-channel implantation and epitaxial IGBT.” pp. 6.6. 1-6.6. 4.
[51] K. C. Chang, N. T. Nuhfer, L. M. Porter, Q. Wahab, “High-carbon concentrations at the silicon dioxide–silicon carbide interface identified by electron energy loss spectroscopy,” Applied Physics Letters, vol. 77, no. 14, pp. 2186-2188, 2000. https://doi.org/10.1063/1.1314293
[52] T. Zheleva, A. Lelis, G. Duscher, F. Liu, I. Levin, M. Das, “Transition layers at the SiO2∕SiC interface,” Applied Physics Letters, vol. 93, no. 2, 2008. https://doi.org/10.1063/1.2949081
[53] W. Lu, L. C. Feldman, Y. Song, S. Dhar, W. E. Collins, W. C. Mitchel, J. R. Williams, “Graphitic features on SiC surface following oxidation and etching using surface enhanced Raman spectroscopy,” Applied Physics Letters, vol. 85, no. 16, pp. 3495-3497, 2004. https://doi.org/10.1063/1.1804610
[54] V. N. Brudnyi, A. V. Kosobutsky, “Electronic properties of SiC polytypes: Charge neutrality level and interfacial barrier heights,” Superlattices and Microstructures, vol. 111, pp. 499-505, 2017. https://doi.org/10.1016/j.spmi.2017.07.003
[55] T. Hiyoshi, T. Kimoto, “Elimination of the Major Deep Levels in n- and p-Type 4H-SiC by Two-Step Thermal Treatment,” Applied Physics Express, vol. 2, no. 9, 2009. https://doi.org/10.1143/apex.2.091101
[56] X. Shen, S. T. Pantelides, “Identification of a major cause of endemically poor mobilities in SiC/SiO2 structures,” Applied Physics Letters, vol. 98, no. 5, 2011. https://doi.org/10.1063/1.3553786
[57] S. Wang, M. Di Ventra, S. G. Kim, S. T. Pantelides, “Atomic-Scale Dynamics of the Formation and Dissolution of Carbon Clusters in SiO2,” Physical Review Letters, vol. 86, no. 26, pp. 5946-5949, 2001.
[58] H. Yan, R. Jia, X. Tang, Q. Song, Y. Zhang, “Effect of re-oxidation annealing process on the SiO2 /SiC interface characteristics,” Journal of Semiconductors, vol. 35, no. 6, pp. 066001, 2014.
[59] Z. Q. Zhong, L. D. Zheng, G. J. Zhang, S. Y. Wang, L. P. Dai, Y. L. Gong, “Effect of Ar Annealing Temperature on SiO2/SiC: Carbon-Related Clusters Reduction Causing Interfacial Quality Improvement,” Advanced Materials Research, vol. 997, pp. 484-487, 2014. https://doi.org/10.4028/www.scientific.net/AMR.997.484
[60] D. Peter, M. K. Jan, H. Tamás, T. Christoph, G. Adam, F. Thomas, “The mechanism of defect creation and passivation at the SiC/SiO2 interface,” Journal of Physics D: Applied Physics, vol. 40, no. 20, pp. 6242, 2007.
[61] J. Powell, J. Petit, J. Edgar, I. Jenkins, L. Matus, W. Choyke, L. Clemen, M. Yoganathan, J. Yang, P. Pirouz, “Application of oxidation to the structural characterization of SiC epitaxial films,” Applied physics letters, vol. 59, no. 2, pp. 183-185, 1991.
[62] Y. Nakano, T. Nakamura, A. Kamisawa, H. Takasu, “Investigation of pits formed at oxidation on 4H-SiC.” pp. 377-380.
[63] H. Kurimoto, K. Shibata, C. Kimura, H. Aoki, T. Sugino, “Thermal oxidation temperature dependence of 4H-SiC MOS interface,” Applied Surface Science, vol. 253, no. 5, pp. 2416-2420, 2006. https://doi.org/10.1016/j.apsusc.2006.04.054
[64] H. Naik, T. P. Chow, “4H-SiC MOS Capacitors and MOSFET Fabrication with Gate Oxidation at 1400°C,” Materials Science Forum, vol. 778-780, pp. 607-610, 2014. https://doi.org/10.4028/www.scientific.net/MSF.778-780.607
[65] T. Hosoi, D. Nagai, M. Sometani, Y. Katsu, H. Takeda, T. Shimura, M. Takei, H. Watanabe, “Ultrahigh-temperature rapid thermal oxidation of 4H-SiC(0001) surfaces and oxidation temperature dependence of SiO2/SiC interface properties,” Applied Physics Letters, vol. 109, no. 18, 2016. https://doi.org/10.1063/1.4967002
[66] S. M. Thomas, Y. K. Sharma, M. A. Crouch, C. A. Fisher, A. Perez-Tomas, M. R. Jennings, P. A. Mawby, “Enhanced field effect mobility on 4H-SiC by oxidation at 1500 °C,” IEEE Journal of the Electron Devices Society, vol. 2, no. 5, pp. 114-117, 2014. https://doi.org/10.1109/JEDS.2014.2330737
[67] S. M. Thomas, M. R. Jennings, Y. K. Sharma, C. A. Fisher, P. A. Mawby, “Impact of the Oxidation Temperature on the Interface Trap Density in 4H-SiC MOS Capacitors,” Materials Science Forum, vol. 778-780, pp. 599-602, 2014. https://doi.org/10.4028/www.scientific.net/MSF.778-780.599
[68] Y. Jia, H. Lv, Q. Song, X. Tang, L. Xiao, L. Wang, G. Tang, Y. Zhang, Y. Zhang, “Influence of oxidation temperature on the interfacial properties of n-type 4H-SiC MOS capacitors,” Applied Surface Science, vol. 397, pp. 175-182, 2017. https://doi.org/10.1016/j.apsusc.2016.11.142
[69] Y. K. Sharma, F. Li, M. R. Jennings, C. A. Fisher, A. Pérez-Tomás, S. Thomas, D. P. Hamilton, S. A. O. Russell, P. A. Mawby, “High-Temperature (1200–1400°C) Dry Oxidation of 3C-SiC on Silicon,” Journal of Electronic Materials, vol. 44, no. 11, pp. 4167-4174, 2015. https://doi.org/10.1007/s11664-015-3949-4
[70] S. M. Sze, K. K. Ng, “Physics of semiconductor devices,” Wiley-Interscience, 2007, 815 p.
[71] J. Urresti, F. Arith, S. Olsen, N. Wright, A. O’Neill, “Design and Analysis of High Mobility Enhancement-Mode 4H-SiC MOSFETs Using a Thin-SiO2/Al2O3 Gate-Stack,” IEEE Transactions on Electron Devices, vol. 66, no. 4, pp. 1710-1716, 2019. https://doi.org/10.1109/ted.2019.2901310
[72] D.-K. Kim, Y.-S. Kang, K.-S. Jeong, H.-K. Kang, S. W. Cho, K.-B. Chung, H. Kim, M.-H. Cho, “Effects of spontaneous nitrogen incorporation by a 4H-SiC(0001) surface caused by plasma nitridation,” Journal of Materials Chemistry C, vol. 3, no. 19, pp. 5078-5088, 2015. https://doi.org/10.1039/C5TC00076A
[73] G. Y. Chung, C. C. Tin, J. R. Williams, K. McDonald, R. K. Chanana, R. A. Weller, S. T. Pantelides, L. C. Feldman, O. W. Holland, M. K. Das, J. W. Palmour, “Improved inversion channel mobility for 4H-SiC MOSFETs following high temperature anneals in nitric oxide,” IEEE Electron Device Letters, vol. 22, no. 4, pp. 176-178, 2001. https://doi.org/10.1109/55.915604
[74] L. Chao-Yang, J. A. Cooper, T. Tsuji, C. Gilyong, J. R. Williams, K. McDonald, L. C. Feldman, “Effect of process variations and ambient temperature on electron mobility at the SiO2/4H-SiC interface,” IEEE Transactions on Electron Devices, vol. 50, no. 7, pp. 1582-1588, 2003. https://doi.org/10.1109/TED.2003.814974
[75] L. A. Lipkin, M. K. Das, J. W. Palmour, “N2O processing improves the 4H-SiC: SiO2 interface,” Materials Science Forum, vol. 389-393, pp. 985-988, 2002. https://doi.org/10.4028/www.scientific.net/MSF.389-393.985
[76] K. Fujihira, Y. Tarui, M. Imaizumi, K.-i. Ohtsuka, T. Takami, T. Shiramizu, K. Kawase, J. Tanimura, T. Ozeki, “Characteristics of 4H–SiC MOS interface annealed in N2O,” Solid-State Electronics, vol. 49, no. 6, pp. 896-901, 2005. https://doi.org/10.1016/j.sse.2004.10.016
[77] J. Senzaki, T. Suzuki, A. Shimozato, K. Fukuda, K. Arai, H. Okumura, “Significant Improvement in Reliability of Thermal Oxide on 4H-SiC (0001) Face Using Ammonia Post-Oxidation Annealing,” Materials Science Forum, vol. 645-648, pp. 685-688, 2010. https://doi.org/10.4028/www.scientific.net/MSF.645-648.685
[78] N. Soejima, T. Kimura, T. Ishikawa, T. Sugiyama, “Effect of NH3 post-oxidation annealing on flatness of SiO2/SiC interface,” Materials Science Forum, vol. 740-742, pp. 723-726, 2013. https://doi.org/10.4028/www.scientific.net/MSF.740-742.723
[79] P. Jamet, S. Dimitrijev, P. Tanner, “Effects of nitridation in gate oxides grown on 4H-SiC,” Journal of Applied Physics, vol. 90, no. 10, pp. 5058-5063, 2001.
[80] V. V. Afanas’ev, A. Stesmans, F. Ciobanu, G. Pensl, K. Y. Cheong, S. Dimitrijev, “Mechanisms responsible for improvement of 4H–SiC/SiO2 interface properties by nitridation,” Applied Physics Letters, vol. 82, no. 4, pp. 568-570, 2003. https://doi.org/10.1063/1.1532103
[81] H. Yoshioka, T. Nakamura, T. Kimoto, “Generation of very fast states by nitridation of the SiO2/SiC interface,” Journal of Applied Physics, vol. 112, no. 2, pp. 024520, 2012. https://doi.org/10.1063/1.4740068
[82] J. Rozen, A. C. Ahyi, X. Zhu, J. R. Williams, L. C. Feldman, “Scaling Between Channel Mobility and Interface State Density in SiC MOSFETs,” IEEE Transactions on Electron Devices, vol. 58, no. 11, pp. 3808-3811, 2011. https://doi.org/10.1109/ted.2011.2164800
[83] J. Rozen, S. Dhar, M. E. Zvanut, J. R. Williams, L. C. Feldman, “Density of interface states, electron traps, and hole traps as a function of the nitrogen density in SiO2 on SiC,” Journal of Applied Physics, vol. 105, no. 12, 2009. https://doi.org/10.1063/1.3131845
[84] P. Jamet, S. Dimitrijev, “Physical properties of N2O and NO-nitrided gate oxides grown on 4H SiC,” Applied Physics Letters, vol. 79, no. 3, pp. 323-325, 2001. https://doi.org/10.1063/1.1385181
[85] A. Morales-Acevedo, G. Santana, J. Carrillo-López, “Thermal oxidation of silicon in nitrous oxide at high pressures,” Journal of The Electrochemical Society, vol. 148, no. 10, pp. F200-F202, 2001.
[86] D. Okamoto, H. Yano, H. Kenji, T. Hatayama, T. Fuyuki, “Improved Inversion Channel Mobility in 4H-SiC MOSFETs on Si Face Utilizing Phosphorus-Doped Gate Oxide,” Electron Device Letters, IEEE, vol. 31, no. 7, pp. 710-712, 2010. https://doi.org/10.1109/LED.2010.2047239
[87] H. Y. Dai Okamotoa, Tomoaki Hatayamac and Takashi Fuyuki, “Development of 4H-SiC MOSFETs with Phosphorus-Doped Gate Oxide,” Materials Science Forum, vol. 717-720, pp. 733-738, 2012. https://doi.org/10.4028/www.scientific.net/MSF.717-720.733
[88] C. Jiao, A. C. Ahyi, C. Xu, D. Morisette, L. C. Feldman, S. Dhar, “Phospho-silicate glass gated 4H-SiC metal-oxide-semiconductor devices: Phosphorus concentration dependence,” Journal of Applied Physics, vol. 119, no. 15, pp. 155705, 2016. https://doi.org/10.1063/1.4947117
[89] D. Okamoto, M. Sometani, S. Harada, R. Kosugi, Y. Yonezawa, H. Yano, “Improved channel mobility in 4H-SiC MOSFETs by boron passivation,” IEEE Electron Device Letters, vol. 35, no. 12, pp. 1176-1178, 2014. https://doi.org/10.1109/LED.2014.2362768
[90] M. Cabello, V. Soler, J. Montserrat, J. Rebollo, J. M. Rafí, P. Godignon, “Impact of boron diffusion on oxynitrided gate oxides in 4H-SiC metal-oxide-semiconductor field-effect transistors,” Applied Physics Letters, vol. 111, no. 4, pp. 042104, 2017. https://doi.org/10.1063/1.4996365
[91] F. Allerstam, G. Gudjónsson, E. Ö. Sveinbjörnsson, T. Rödle, R. Jos, “Formation of Deep Traps at the 4H-SiC/SiO2 Interface when Utilizing Sodium Enhanced Oxidation,” Materials Science Forum, vol. 556-557, pp. 517-520, 2007. https://doi.org/10.4028/www.scientific.net/MSF.556-557.517
[92] G. Gudjonsson, H. O. Olafsson, F. Allerstam, P. A. Nilsson, E. O. Sveinbjornsson, H. Zirath, T. Rodle, R. Jos, “High field-effect mobility in n-channel Si face 4H-SiC MOSFETs with gate oxide grown on aluminum ion-implanted material,” IEEE Electron Device Letters, vol. 26, no. 2, pp. 96-98, 2005. https://doi.org/10.1109/LED.2004.841191
[93] A. F. Basile, A. C. Ahyi, L. C. Feldman, J. R. Williams, P. M. Mooney, “Effects of sodium ions on trapping and transport of electrons at the SiO2/4H-SiC interface,” Journal of Applied Physics, vol. 115, no. 3, pp. 034502, 2014. https://doi.org/10.1063/1.4861646
[94] D. J. Lichtenwalner, L. Cheng, S. Dhar, A. Agarwal, J. W. Palmour, “High mobility 4H-SiC (0001) transistors using alkali and alkaline earth interface layers,” Applied Physics Letters, vol. 105, no. 18, 2014. https://doi.org/10.1063/1.4901259
[95] K. Ueno, T. Oikawa, “Counter-doped MOSFETs of 4H-SiC,” IEEE Electron Device Letters, vol. 20, no. 12, pp. 624-626, 1999. https://doi.org/10.1109/55.806105
[96] P. Fiorenza, F. Giannazzo, M. Vivona, A. L. Magna, F. Roccaforte, “SiO2/4H-SiC interface doping during post-deposition-annealing of the oxide in N2O or POCl3,” Applied Physics Letters, vol. 103, no. 15, pp. 153508, 2013. https://doi.org/10.1063/1.4824980
[97] A. Modic, G. Liu, A. C. Ahyi, Y. Zhou, P. Xu, M. C. Hamilton, J. R. Williams, L. C. Feldman, S. Dhar, “High channel mobility 4H-SiC MOSFETs by antimony counter-doping,” IEEE Electron Device Letters, vol. 35, no. 9, pp. 894-896, 2014. https://doi.org/10.1109/LED.2014.2336592
[98] Y. Zheng, T. Isaacs-Smith, A. C. Ahyi, S. Dhar, “4H-SiC MOSFETs with borosilicate glass gate dielectric and antimony counter-doping,” IEEE Electron Device Letters, vol. 38, no. 10, pp. 1433-1326, 2017. https://doi.org/10.1109/LED.2017.2743002
[99] W. L. Warren, M. R. Shaneyfelt, D. M. Fleetwood, P. S. Winokur, “Nature of defect centers in B‐ and P‐doped SiO2 thin films,” Applied Physics Letters, vol. 67, no. 7, pp. 995-997, 1995. https://doi.org/10.1063/1.114970
[100] G. Liu, A. C. Ahyi, Y. Xu, T. Isaacs-Smith, Y. K. Sharma, J. R. Williams, L. C. Feldman, S. Dhar, “Enhanced Inversion Mobility on 4H-SiC (1120) Using Phosphorus and Nitrogen Interface Passivation,” IEEE Electron Device Letters, vol. 34, no. 2, pp. 181-183, 2013. https://doi.org/10.1109/led.2012.2233458
[101] Y. Nanen, M. Kato, J. Suda, T. Kimoto, “Effects of nitridation on 4H-SiC MOSFETs fabricated on various crystal faces,” IEEE Transactions on Electron Devices, vol. 60, no. 3, pp. 1260-1262, 2013. https://doi.org/10.1109/TED.2012.2236333
[102] K. Fukuda, M. Kato, K. Kojima, J. Senzaki, “Effect of gate oxidation method on electrical properties of metal-oxide-semiconductor field-effect transistors fabricated on 4H-SiC C(0001̄) face,” Applied Physics Letters, vol. 84, no. 12, pp. 2088-2090, 2004. https://doi.org/10.1063/1.1682680
[103] M. Okamoto, Y. Makifuchi, M. Iijima, Y. Sakai, N. Iwamuro, H. Kimura, K. Fukuda, H. Okumura, “Coexistence of small threshold voltage instability and high channel mobility in 4H-SiC (0001) metal–oxide–semiconductor field-effect transistors,” Applied Physics Express, vol. 5, no. 4, pp. 041302, 2012.
[104] H. Yoshioka, J. Senzaki, A. Shimozato, Y. Tanaka, H. Okumura, “Effects of interface state density on 4H-SiC n-channel field-effect mobility,” Applied Physics Letters, vol. 104, no. 8, pp. 083516, 2014.
[105] S. Asada, T. Kimoto, J. Suda, “Effect of postoxidation nitridation on forward current-voltage characteristics in 4H-SiC mesa p-n diodes passivated with SiO2,” IEEE Transactions on Electron Devices, vol. 64, no. 7, pp. 3016-3018, 2017. https://doi.org/10.1109/TED.2017.2700336
[106] R. Ghandi, B. Buono, M. Domeij, R. Esteve, A. Schoner, J. Han, S. Dimitrijev, S. A. Reshanov, C. M. Zetterling, M. Ostling, “Surface-passivation effects on the performance of 4H-SiC BJTs,” IEEE Transactions on Electron Devices, vol. 58, no. 1, pp. 259-265, 2011. https://doi.org/10.1109/TED.2010.2082712
[107] T. Kimoto, H. Kawano, M. Noborio, J. Suda, H. Matsunami, “Improved Dielectric and Interface Properties of 4H-SiC MOS Structures Processed by Oxide Deposition and N2O Annealing,” Materials Science Forum, vol. 527-529, pp. 987-990, 2006. https://doi.org/10.4028/www.scientific.net/MSF.527-529.987
[108] W. Sung, B. Jayant Baliga, A. Q. Huang, “Area-Efficient Bevel-Edge Termination Techniques for SiC High-Voltage Devices,” IEEE Transactions on Electron Devices, vol. 63, no. 4, pp. 1630-1636, 2016. https://doi.org/10.1109/ted.2016.2532602
[109] H. Miyake, T. Kimoto, J. Suda, “Improvement of current gain in 4H-SiC BJTs by surface passivation with deposited oxides nitrided in N2O or NO,” IEEE Electron Device Letters, vol. 32, no. 3, pp. 285-287, 2011. https://doi.org/10.1109/LED.2010.2101575
[110] T. Okuda, T. Kobayashi, T. Kimoto, J. Suda, “Impact of annealing temperature on surface passivation of SiC epitaxial layers with deposited SiO2 followed by POCl3 annealing.” pp. 233-235.
[111] M. Domeij, H. S. Lee, E. Danielsson, C. M. Zetterling, M. Ostling, A. Schoner, “Geometrical effects in high current gain 1100-V 4H-SiC BJTs,” IEEE Electron Device Letters, vol. 26, no. 10, pp. 743-745, 2005. https://doi.org/10.1109/led.2005.856010
[112] T. Daranagama, V. Pathirana, F. Udrea, R. McMahon, “Novel 4H-SiC bipolar junction transistor (BJT) with improved current gain.” pp. 1-6.
[113] L. Lanni, B. G. Malm, M. Östling, C. M. Zetterling, “Influence of passivation oxide thickness and device layout on the current gain of SiC BJTs,” IEEE Electron Device Letters, vol. 36, no. 1, pp. 11-13, 2015. https://doi.org/10.1109/LED.2014.2372036
[114] S. Zelmat, M.-L. Locatelli, T. Lebey, S. Diaham, “Investigations on high temperature polyimide potentialities for silicon carbide power device passivation,” Microelectronic Engineering, vol. 83, no. 1, pp. 51-54, 2006. https://doi.org/10.1016/j.mee.2005.10.050
[115] I. H. Kang, M. K. Na, O. Seok, J. H. Moon, H. W. Kim, S. C. Kim, W. Bahng, N. K. Kim, H.-C. Park, C. H. Yang, “Effect of surface passivation on breakdown voltages of 4H-SiC Schottky barrier diodes,” Journal of the Korean Physical Society, vol. 71, no. 10, pp. 707-710, 2017. https://doi.org/10.3938/jkps.71.707
[116] S. Diaham, M. L. Locatelli, T. Lebey, C. Raynaud, M. Lazar, H. Vang, D. Planson, “Polyimide Passivation Effect on High Voltage 4H-SiC PiN Diode Breakdown Voltage,” Materials Science Forum, vol. 615-617, pp. 695-698, 2009. https://doi.org/10.4028/www.scientific.net/MSF.615-617.695
[117] A. Siddiqui, H. Elgabra, S. Singh, “The Current Status and the Future Prospects of Surface Passivation in 4H-SiC Transistors,” IEEE Transactions on Device and Materials Reliability, vol. 16, no. 3, pp. 419-428, 2016. https://doi.org/10.1109/TDMR.2016.2587160